Scholarly article on topic 'Transparent Conducting Oxides for High Temperature Processing'

Transparent Conducting Oxides for High Temperature Processing Academic research paper on "Materials engineering"

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Abstract of research paper on Materials engineering, author of scientific article — M. Allegrezza, M. Canino, M. Bellettato, C. Summonte

Abstract Indium tin oxide (ITO) thin films were deposited by magnetron sputtering from a ceramic target, and annealed at temperatures up to 1000°C in N2 atmosphere. Some samples were capped in a-Si:H or spin-on glass to prevent residual oxygen contamination from the annealing ambient, and annihilation of oxygen vacancies. The electrical and optical properties were measured before and after annealing. It is found that the protecting layer effectively limits the ITO degradation up to 900°C, whereas high transparency is preserved in all cases. The results indicate the applicability of the procedure to high temperature devices, and opens the way to the application of a variety of nanostructured materials in advanced photovoltaic devices.

Academic research paper on topic "Transparent Conducting Oxides for High Temperature Processing"

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Energy Procedia 44 (2014) 23-31

E-MRS Spring Meeting 2013 Symposium D - Advanced Inorganic Materials and Structures for Photovoltaics, 27-31 May 2013, Strasbourg, France

Transparent conducting oxides for high temperature processing

M. Allegrezzaa*, M. Caninoa, M. Bellettatoa, C. Summontea

aCNR-IMM uos Bologna, Via P. Gobetti 101, 40129 Bologna (Italy)

Abstract

Indium tin oxide (ITO) thin films were deposited by magnetron sputtering from a ceramic target, and annealed at temperatures up to 1000°C in N2 atmosphere. Some samples were capped in a-Si:H or spin-on glass to prevent residual oxygen contamination from the annealing ambient, and annihilation of oxygen vacancies. The electrical and optical properties were measured before and after annealing. It is found that the protecting layer effectively limits the ITO degradation up to 900°C, whereas high transparency is preserved in all cases. The results indicate the applicability of the procedure to high temperature devices, and opens the way to the application of a variety of nanostructured materials in advanced photovoltaic devices.

© 2013TheAuthors. Publishedby Elsevier Ltd.

Selectionandpeer-reviewunderresponsibility ofTheEuropeanMaterialsResearch Society(E-MRS) Keywords: ITO; TCO; thermal annealing; optical properties.

1. Introduction

Transparent conducting oxides (TCO's) are widely used in touch screens and commercial electronics in general, as well as in thin film solar cell, to access the top contact of the device, or of the top junction in a multijunction device in the superstrate configuration. In this last case, the material needs to be resistant the maximum process temperature, that is typically below 250°C, which is readily verified in a number of different TCO materials such as Indium Tin Oxide (ITO), Al doped zinc oxide (AZO), magnesium oxide (MgO), or F doped tin oxide (FTO) However, a variety of new applications could be designed if TCO's tolerant to high temperature processing were

* Corresponding author. Tel.: +39-051-6399132; Fax: +39-051-6399216 E-mail address: allegrezza@bo.imm.cnr.it

1876-6102 © 2013 The Authors. Published by Elsevier Ltd.

Selection and peer-review under responsibility of The European Materials Research Society (E-MRS) doi: 10.1016/j.egypro.2013.12.005

available. A typical case is that of silicon nanodot based multijunction solar cells in superstrate configuration, a device that is framed in the context of the so called third generation solar cells. In such a device, the process sequence starting from the transparent substrate implies the deposition of the TCO, needed to access the top junction of the device, then the fabrication of the wide band gap, silicon nanodot based p-i-n junction, that typically requires the use of temperatures in the range 900 to 1150°C [1, 2]. In fact, the identification of a suitable TCO is mandatory to the need of transferring the silicon nanodot technology to the device level, that otherwise would be limited on membrane devices [3], a technology that is suitable for laboratory investigation but not transferable to mass production. Little is known about the optical and electrical characteristics of TCO's at high temperature, mainly because they are normally deposited on not temperature resistant substrates, typically glass or polymers based materials, such as the case of flexible solar devices or electronics. Minami et al. [4] reported about the variation of resistivity upon annealing at different temperatures up to 900°C, with no information on the parallel behavior of optical properties. Gregory et al. [5] studied the change in resistance of ITO for annealing up to 1553°C for piezoelectric purposes.

The basic properties of a TCO are a low sheet resistance, and good transparency in the visible. The two quantities have opposite behavior with respect of free carrier concentration. Electrical conduction in ITO is guaranteed by tin donors, and oxygen vacancies, that are particularly sensitive to thermal treatment, as they are expected to annihilate with the residual oxygen diffusing from the annealing ambient. A strategy is therefore needed to prevent such occurrence. In this paper, we report on the optical and electrical properties of annealed ITO films, deposited by sputtering and subsequently encapsulated to prevent oxygen in-diffusion. The results are compared to unencapsulated samples.

2. Experimental

78±3 nm ITO layers were deposited on several quartz substrates (25x25 mm2) by RF magnetron sputtering at 13.56MHz in argon atmosphere from a ceramic target (In2O3:SnO2 90:10%). 40W RF power was used and the substrates were heated to 250°C during the deposition. See [6] for details.

Fig. 1. The samples set were annealed from 600 to 1000°C for 30 minutes; the 2 low temperature step at 350 and 450°C were necessary to the SOD curing, but repeated for unprotected and Si covered samples too. 10°C/min heating ramps were used.

The optical and electrical properties of the as-deposited samples were measured by means of UV-visible spectroscopy and a 4-point resistivity probe station. Reflectance and transmittance (R&T) spectra were acquired with an Avantes fiber optic spectrophotometer (in the range 240-1100 nm) and with a HP 8452A diode array spectrophotometer (in the range 190-820 nm).

Some of the samples were protected by 40 nm of amorphous silicon (a-Si:H), deposited by plasma enhanced chemical vapour deposition (PECVD), or by thin layers of spin-on-dopant glass (SOD). The SOD glass was chosen because of its thermal stability up to 1100°C with adequate curing. Both capped and uncapped samples

0 60 120 180 240 300 360 420 Time (min)

were then annealed in a quartz furnace at temperatures ranging between 600°C to 1000°C, in steps of 100°C, in fluent nitrogen for 30 minutes. The different annealing processes are reported in figure 1. After annealing, the silicon capping was chemically etched in tetramethylammonium hydroxide (TMAH, 2% diluted in DI water, 50°C) while the SOD protective layer was removed in HF 1:50. An etch time 60 s to 90 s was typically needed to remove the silicon capping. Prolonged TMAH etch after this time was avoided as it was observed to affect the electrical properties.

R&T spectra and square resistance of annealed sample, after wet etching of the capping layer, where present, were measured again and compared with the as-deposited reference. For each temperature step, the complex dielectric function of the annealed film was calculated by the simulation of the experimental spectra. Our simulations are based on the open source codes 'Optical' [7] and 'GTB-fit' [8], both based on the Generalized Transfer Matrix method (GTM), that allow to analytically extract the refractive indexes of these materials from R&T measurements.

Optical and electrical information about the samples were correlated to surface morphology analyzed by a Zeiss Gemini 1530 scanning electron microscope.

3. Results and discussion

3.1. Capping removal issues

To perform the optical and electrical characterization of the ITO films after thermal treatments, both silicon and SOD glass protective layers had to be chemical etched. The silicon layer can be easily removed in TMAH, which is selective with respect to ITO. For high temperature annealing (over 800°C), despite the high purity nitrogen environment, some surface oxidation is found, as concluded by the fact that the etch in TMAH was only possible after a dip in HF. This is because TMAH does not etch the SiO2. Visual inspection evidenced the presence of a residual silicon film that disappeared after TMAH, indicating that silicon oxidation was not complete, and that the surface oxide was effectively removed in HF. The complete removal of Si is also readily detected by R&T, as the optical detection limit of Si on ITO is lower than 0.5 nm. This unavoidable oxygen contamination is indeed the main reason why we had to introduce a protective layer on top of the ITO, in which the conduction is driven by oxygen vacancies [9].

The SOD, which is a dopant glass commonly used in microelectronic processing to introduce boron in silicon by high temperature annealing, should in principle be easily removable in diluted HF. Previous temperature stability tests of SOD on silicon were done, leading to the introduction of two intermediate temperature curing steps at 350 and 450°C, for 10' (see figure 1). In this condition, the layer is stable up to 1100°C and can be removed in HF. Unfortunately, when spinned on ITO, the thermal treatment of the SOD at temperatures higher than 700°C leads to the formation of a not well identified compound. This unwanted layer shows a very low etch rate in HF and is deleterious mainly for the electrical properties of the ITO (see next sections for details).

We stress that the chemical etching of the protective layer is a critical process, which can seriously damage the underlying material, even more than the annealing step. Anyway, in a real device in superstrate configuration, which requires a high temperature treatment, the device itself acts as a barrier layer, and this final etching step will only affect the pad contact area.

3.2. Optical spectroscopy and SEM characterization

Figure 2a reports transmittance, reflectance and absorption spectra of as-deposited and 900°C annealed samples (both unprotected and Si capped). These curves represent a typical set of UV-visible spectroscopic measurements. To analyze the effect of annealing on a wide temperature range, the transmittance of the analyzed samples at 500nm is reported in figure 2b, comparing the as-deposited film (full symbols) with the corresponding annealed sample (hollow symbols). The dots refer to unprotected films before and after annealing, and show a systematic decrease in transmittance of about 2%. The squares represent SOD protected film. A not clear relation is found because of HF removal issues discussed in section 3.1. Good transparency is instead maintained for the a-Si:H

protected films, whose transmittance is unchanged with respect to the as-deposited material, thus indicating that both the higher temperature annealing and the TMAH etch are compatible, at least from the optical properties point of view, with the ITO. This kind of representation needs to be correlated with the corresponding R&T spectra in the whole UV-visible range. The transmittance at a single wavelength is in fact strongly related to the interference fringes with the substrate due to the material thickness, not exactly the same for all the samples, see for example the figure 2a. However, the thickness difference between the analyzed samples is low enough that the trend in the transmittance reported in figure 2b is still valid.

Fig. 2. a) Reflectance, transmittance and absorption of the as-deposited and 900°C annealed ITO films. A clear red shift of the absorption edge is observed after annealing without protective layer. b) Transmittance at 500 nm as a function of the annealing temperature.

From reflectance and transmittance data, the calculation of the absorption coefficient can be done, in a first approximation, as:

a = -ln t

where t is the film thickness and Re, Te are the experimental spectra. To determine a, in this paper we used the software 'Optical' [7], that makes use of Eq. (1) as a guess value for a numerical fitting procedure; a is then calculated, wavelength by wavelength, as the value that satisfies the equation:

1 - R 1 - R

where Tc, Rc are the transmittance and reflectance spectra, calculated using the GTM method, considering the ambient/ITO/substrate/ambient system and using for ITO the optical function resulting from a prefit, needed to account for the correct thickness and refractive index [7,8].

From this numerical inversion, the absorption coefficient for as-deposited and annealed samples was calculated and reported in figure 3. The graph in the figure shows a clear red shift of the absorption edge of the uncapped films with respect to the as-deposited reference. This indicates a slight degradation of the optical performances of the unprotected TCO.

By comparing a of the silicon capped ITO, with the as-deposited value, we found that the barrier layer is efficient up to 900°C, keeping almost unchanged its optical properties.

Energy (eV)

Fig. 3. Absorption coefficient, determined by R&T spectroscopy, of the as-deposited and annealed ITO films. The inset shows an enlargement

of the curves.

Figure 4 shows the planar SEM images of as deposited and silicon capped 900°C annealed ITO, at the same magnification. Only a slight increase in the grain size is detected, thus confirming that even on a microscopic scale the material quality is almost preserved, apart from some fractures that are not detected by the macroscopic optical characterization.

Fig. 4. Planar SEM images of as-deposited and 900°C annealed sample, after the silicon capping removal. After the thermal treatment the grain

size is slightly increased and some small fractures are visible.

The 1000°C annealed samples shows residual silicon spots that are resistant to TMAH etch, which suggests the formation of a mixed phase with ITO. The silicon spots are responsible for the increased absorption detected in the 1.5 - 3.5 eV spectral range. The in-plane SEM observations of this sample are reported in Fig.5. Images acquired at different magnifications show a fractured macroscopic spot, and an overall rearrangement of the morphology. By increasing the magnification to the scale of figure 4, an increase of grain size from the nanometric (Fig.4, right panel) to the micrometric scale (Fig.5, right panel) is observed. The sample surface is porous and some crystallites are present on top of it.

The absorption coefficient of SOD capped layers is not reported here because the experimental spectra are not really comparable after the unsuccessful removal in HF.

Fig. 5. SEM image of 1000°C annealed ITO film, after TMAH etch of the silicon capping, different magnifications. The surface is completely different from the as-deposited material and shows very big recrystallized domains (figure on the left). Increasing the magnification, the surface

appears cracked and, to the lowest scale, porous.

To better describe the optical properties of the ITO upon annealing, the complex dielectric function of the material (i.e. the refractive index and the extinction coefficient) was calculated by analytically fitting the spectroscopic measurements. The procedure is based on the scattering matrix approach [7], treating each sample as a multilayer in which only the dielectric function of the ITO is unknown. By using the code 'GTB-fit' [8], we fit the R&T spectra with a superposition of 2 Lorentz oscillators [10] and a Drude contribution [11, 12], to take into account the free carrier absorption at long wavelengths. A typical experimental and simulated spectrum is shown in figure 6a, related to 80nm as-deposited ITO on quartz. The simulation is based on the x2 minimization between measured and computed curves and leads to very accurate results. From this analysis we extracted the real and imaginary part of the refractive index (n and k, respectively) of the TCO as a function of the annealing temperature. The results are reported in figure 6b. Unprotected films show a remarkable increase of the refractive index in the IR spectral region, while decreasing the free carrier absorption (i.e. the Drude contribution in our fit) in the same range. This behavior can be justified by oxygen incorporation during annealing. The optical properties are preserved up to 900°C in presence of a protective a-Si:H layer. Both n and k are similar to the case of the as-deposited sample.

The simulation of the sample annealed at 1000°C required the use of 2nm of microcrystallized silicon layer, in agreement with the evident decrease of transparency and with the damaged surface visible by SEM. The absorption of ITO also increases, as reflected by the extinction coefficient k, while the decrease in the refractive index can be explained by the formation of a porous compound ITO-silicon shown in figure 5 (right panel).

Fig. 6. a) Simulated and experimental reflectance and transmittance spectra of 80 nm thick ITO layer on quartz. A very good agreement between the curves is found. b) Refractive indexes (n) and extinction coefficients (k) of ITO, calculated from the fitting of the experimental data, as-deposited and after annealing at different temperatures and capping removal where present.

3.3. Electrical characterization

The square resistance as a function of the annealing temperature was measured with a 4-points resistivity probe station; the measurements were carried out in air, at room temperature. Figure 7 reports the square resistances after 600 to 1000°C annealing, compared with the corresponding as-deposited resistances, sample by sample, measured before the thermal process. The sheet resistance before annealing of our sample set is 22±2Q. (for 78±3nm ITO thickness). The annealing of the unprotected material leads to a moderate decrease in the conductivity up to 800°C, while a faster electrical degradation is found for higher temperatures, making the material no longer suitable as a transparent electrode.

Fig. 7. 4-probes square resistance as a function of the annealing temperature for both protected and unprotected ITO layers. The full dots in the bottom square show the resistivity before the thermal process. The best results are achieved with 40nm of Si barrier layer, up to 900°C.

Figure 7 also reports the effect of SOD capping layer, that is detrimental for the ITO properties, mainly because of the removal issues discussed in the paragraph 3.1. HF etch induces a rapid degradation in the conductivity, yet retaining a good transparency, making the SOD glass a not reliable protective barrier.

The best results are achieved with the amorphous silicon encapsulation layer, that preserves almost unchanged the ITO square resistance up to 900°C, in spite of the HF + TMAH wet etch. The final square resistance after 900°C process is 30Q, very close to the initial values. In agreement with the optical characterization, the material quality shows a rapid degradation for the 1000°C annealing step (the square resistance goes over the detection limit of the instrument), but in this case the problem is not necessarily related to the ITO itself but to the strong interaction with the silicon protective layer, as discussed in section 3.2.

The increase of resistivity for the uncapped with respect of silicon capped samples, associated to the observation of partial oxidation of the silicon capping, suggests a role of oxygen contaminants in the annealing atmosphere, with possible partial saturation of vacancies and decrease of carrier concentration [9]. The lack of temperature dependence of square resistance of uncapped samples, that remains constant between 600°C and 800°C, indicates that the process is not diffusion limited. Although further investigation is needed to achieve a conclusive understanding of the process, we can propose fast oxygen diffusion along grain boundaries, that already saturates over the film thickness at 600°C. A much slower diffusion process into the grains takes also place, that becomes effective only at 900°C. Basing on extrapolation of diffusivity of oxygen in ITO reported in the literature for much lower temperatures [13], we estimated a diffusion length of about 30 nm after 30' at 900°C, which is in very good agreement with the 25-30 nm diameter of columnar ITO grains observed in cross section by transmission microscopy on ITO samples deposited in the past under identical conditions [14].

The unmodified square resistance, with respect to the as-deposited case, observed for silicon capped samples after

900°C annealing indicates that the formation of cracks detected by SEM (Fig.4) does not affect electrical properties of the sample. After 1000°C annealing, the degradation of electrical properties of the material is associated to structural rearrangement accompanied by fractures and surface porosity (Fig.5). Although it is not clear if electrical degradation has electronic or structural origin, we note that oxygen replenishment was already correlated to efficient grain growth, yet associated to drop of carrier concentration due to the dissipation of oxygen vacancies [9].

4. Summary and conclusions

ITO films were deposited by magnetron sputtering and annealed at temperatures up to 1000°C for 30'. We have shown that the a-Si:H capped films maintain unaltered electrical properties up to 900°C treatment, whereas the material becomes insulating for higher temperatures. The transparency is preserved in all cases. On the contrary, the uncapped material presents a moderate degradation up to 800°C, yet retaining a sufficiently low resistivity, but becomes insulating for higher temperatures. The SOD glass is not suitable as a protective layer because his low stability in temperature when overlying the ITO layer.

The strong interaction between silicon and ITO at temperatures over 900°C leads to a formation of a surface layer, not removable in TMAH, completely cracked and porous, with the result that the ITO is no longer conductive. This is an indication that the thin hydrogenated amorphous silicon film used in this work is not a sufficiently good barrier to prevent the oxygen in-diffusion into the ITO for temperatures over 900°C. We stress that a temperature stable and easily removable protective layer is required to characterize the effect of annealing on ITO, while when applied to the fabrication of high temperature devices in superstrate configuration, the issue concerning the removal of the protective layer will be limited to the pad contact area, while the rest of the area will be protected from the annealing environment by the subsequently deposited device layers. The results path the way to the use of ITO for devices requiring a high temperature thermal treatment, such as for instance silicon nanostructured based third generation solar cell devices.

Acknowledgements

The research leading to these results has received funding from the European Community's FP7 (FP7/2007-2013) under grant agreement n°. 245977 under the project title NASCEnT.

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