Deadbeat Current Controller Design for Multilevel Grid Connected Inverter Academic research paper on "Electrical engineering, electronic engineering, information engineering"

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Energy Procedia 100 (2016) 237 - 242

3rd International Conference on Power and Energy Systems Engineering, CPESE 2016, 8-12

September 2016, Kitakyushu, Japan

Deadbeat current controller design for multilevel grid connected inverter Yousry Atiaa*, Mahrous Ahmedb, ArefEliwaa, Mahmoud Salema

a Electronics Research Institute, Dokki, Cairo, 12622, Egypt b Faculty of Engineering, Aswan University, Aswan, Egypt

Abstract

This paper presents a three-phase hybrid multilevel converter (MLC) topology for photovoltaic (PV) grid-connected system with a new current control scheme. Deadbeat current controller in a-p reference frame is designed in S-domain using derivative feedback to make the actual current to track exactly the reference current. The controller generates a-p reference voltage for inverter with lower power electronic components. The inverter has high quality output voltage which leads to a high quality injected grid current thus eliminates the using of custom and more expensive power filter for the high power rating systems. Besides, MLC switching losses is very low due to most of the power cell switches are operating at nearly fundamental frequency. Some selected simulation results are presented to validate the proposed system and the proposed control scheme. ©2016 The Authors.PublishedbyElsevierLtd. This is an open access article under the CC BY-NC-ND license (http://creativecommons.Org/licenses/by-nc-nd/4.0/).

Peer-review under responsibility of the organizing committee of CPESE 2016

Keywords: Grid connected systems, Multilevel Converter, Deadbeat, Current control.

1. Introduction

Pulse width modulation (PWM) converters are the core of grid-connected PV distributed generation. The controller structure with an internal current control loop and performance of the converter essentially depends on the quality of this current control loop. Therefore, current control loop of PWM converter is one of the most important subjects of power electronics [1]. Predictive controllers calculate the inverter voltages required to force the measured currents to follow the reference current [2]. It is well known that digital deadbeat controllers provide the fastest dynamic response, which is equal to n switching cycles for a reference step, where n is the order of the system [3]. Traditionally, control of these converters was carried out by using the synchronous d-q reference frame [4]. Working in a-P stationary reference frame is raised in some literature [4-7] nowadays for some benefits. These benefits as elimination of the PLL, elimination abc/dq and dq/abc transformations significantly that reducing overall computation burden and will lower controller cost. MLC has advantages include good power quality, good electromagnetic compatibility (EMC), low switching losses, and high voltage capability. The main disadvantages of MLC are a larger number of switching semiconductors are required for lower-voltage systems.

* Corresponding author. Tel.: +2-023-331-0512; fax: +2-023-335-1631. E-mail address: yousry_atia@yahoo.com.

1876-6102 © 2016 The Authors. Published by Elsevier Ltd. This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/).

Peer-review under responsibility of the organizing committee of CPESE 2016 doi:10.1016/j.egypro.2016.10.171

This paper presents cascaded H-Bridge MLC for grid connected system controlled by a digital deadbeat current controller. The cascaded H-Bridge multilevel inverter is chosen for its advantages. These advantages as it requires the least number of components among all other converters topologies to achieve the same number of voltage levels, also it feature a high modularity degree because each power cell can be seen as a module with similar circuit topology and control. However, it requires many isolated DC voltage sources, which are available in distributed generation like PV farms. The controller is built in stationary a-P reference frame to eliminate PLL, and PI current controllers. It also minimizes the computation burden for transformation from and to d-q reference frame. Two cross coupling components are introduced in a-P reference frame controller to eliminate steady state error in the system current.

v = e + Lv „= e„ + L(1)

a a i, p p i, ^ >

2. Modeling and Design of the Proposed Controller

Generally, current control techniques need the reference current as an input to the control algorithm. Then, the reference voltage can be determined such that the reference current is tracked fast and accurately. For the grid connected applications assume the grid supply is an ideal voltage source with phase voltage e with filter inductance L and neglected inductance resistance.

The inverter voltage v in the ap reference frame for the three phase inverter can be obtained [8] as follows:

di T diB

v „= eB+ L—?~ dt p p dt

Eq. (1) can be represented in S-domain as:

v (s ) - E (5 ) v Js ) - E Js )

I >) = ^ ; f ^ ; I pis) = (2)

For unity feedback gain H(S) = 1 the closed-loop transfer function (CLTF) is:

CLTF = A ' Ls =-1--(3)

1 + (A / Ls ) 1 + (L / A )s

The deadbeat action is to force the actual current to follow the reference current within single sampling time (T). So, the deadbeat transfer function is:

DBTF = 1/(1+ Ts) (4)

Comparing equations (3) and (4) yields that the gain A=L/T

Figurel shows the S-domain block diagram of the grid connected inverter system with deadbeat current controller. The system transfer function can be derived as stated in (4):

I» _ 1 1 ) _ 1

I of is) 1 + Ts I Pf is) 1 +Ts

Eq. (5) simulates the performance of the deadbeat controller where the controlled current follows the reference current in aP reference frame with a delay time of single sample (T). In this work, it is proposed to cancel out this delay time by using a derivative feedback shown in the block diagram provided in Fig. 2. As shown in Fig. 2 the forward and feedback transfer functions are:

G = — H = 1 + C s Where 'C' is constant, and therefore the TF is defined as: Ts

Iais) _ 1/Ts _ 1 I/s) _ 1 (fi)

Iaeef (s) 1 + (1 + Cs)/Ts 1 + (T + C)s IPef is) 1 + (T + C)s

Fig. 1. Closed loop block diagram of deadbeat grid connected

inverter current controlled system. Fig. 2. Proposed controller using a derivative feedback.

To cancel out the delay time between the reference value and the controlled variable, it is proposed to set the constant (C) equals to (-T). In this case, the actual current will track exactly the reference current which is the main contribution of this paper. It is well known that the actual currents in such system are not purely sinusoidal waveforms due to switching action. So to avoid the differentiation problem of the actual currents, the following equation can be used:

Ia= I sin®?, Ip--l COSfi»?,

= a>I cos cot =-aI,

„ — = aI sin«? =aI„

dt p dt a

It can be noted that, ip in Eq. (7) appears in the equation of ia and vice versa, so eq. (7) introduces two cross coupling component for the current equations in ap reference frame which is another contribution in this paper. Normally the cross coupling components appear in the dq reference frame in most literatures. Using (7) the block diagram in Fig.2 can be redrawn by the block diagram shown in Fig.3. It can be noted that ap reference grid currents values can be come from maximum power point tracker for PV array or can be calculated from power references as in [8].

Figure 3. The proposed current controller block diagram

3. Fifteen -Levels Hybrid Multi-Level Converter

Figure 4 shows the general three phase configuration of the hybrid MLC topology with lower power component elements for 15 levels [9]. This inverter is composed of single unit of main stage, 6 units of auxiliary stages, '18' switches and '7' isolated dc voltage sources. The auxiliary stages are connected in series with the main stage. The main stage is a conventional two-level three-phase six switch inverter. Each auxiliary cell consists of two switches and single dc input voltage. The basic auxiliary cell of the proposed inverter includes two switches are always operating in a complementary mode and single input dc voltage to generate two levels output voltage waveform 0 and its input dc source. Therefore, the auxiliary cell gives V0 = 0, when the switch S21 is ON and it gives its input voltage when S21 is OFF. Using two auxiliary cells with the main cell, yields in generating 8 levels output pole voltage and 15 levels for the line-to-line-voltage. It can be noted that the ratio of the main cell dc source is 4 Vdc and the auxiliary cells are 2Vdc and Vdc, respectively, therefore VaN has eight states (0, Vdc, 2Vdc, 3Vdc, 4Vdc, 5Vdc, 6Vdc, 7Vdc). Thus the load line-to-line voltages can have 15 states (7Vdc, 6Vdc, 5Vdc, 4Vdc, 3Vdc, 2Vdc, Vdc, 0, -Vdc, -2Vdc, -3Vdc, -4Vdc, -5Vdc, -6Vdc, -7Vdc). Table 1 summarizes the output voltage levels for 15 levels using two auxiliary cells with the main cell. The space vector modulation (SVM) is employed for this topology to generate ac output voltages at its terminals. Generally, every switching state creates specific three-phase voltages vaN, vbN and vcN with respect to the neutral of the dc bus voltage, which can be defined by equation (19):

~ k a V dc

= kb Vdc = kc Vd.

cN c ' dc

Where ka,kband kc e [0, 1, 2, 3, be calculated from:

vab = (ka - kb ) Vdc = k ab V dc

v, = (k, - k ) Vd = k, V,

bc b c dc bc dc

vca = (kc - k a ) Vdc = k ca Vdc

, 7] and switching states of inverter line-to-line voltages vab, vbc, and vca can

The detail analyse is provided in [9]. The inverter line-to-line reference voltage can be sampled at the rate of switching frequency fs, the sampling interval Ts = l/fs extends over three subcycles t1,t2,and t3. Therefore it is approximated by the available voltage space vectors generated from equation (9), where during each modulation subcycle a switching sequence is generated. Consequently the inverter pole voltages vaN,vbN,and vcN can be evaluated as well as switches states.

Table 1. Switching states of phase VAN

MLC Pole voltage

Switches of arm "A'

Auxilian1 tut*

... Ï4J 4 Ú

Is«? -«?

Van Sail Sal2 Sa21 Sa22 Sa31 Sn32

OVdc 0 1 0 1 0 1

1 Vdc 0 1 0 1 1 0

2 Vdc 0 1 1 0 0 1

3Vdc 0 1 1 0 1 0

4 Vdc 1 0 0 1 0 1

5 Vdc 1 0 0 1 1 0

6 Vdc 1 0 1 0 0 1

7 Vdc 1 0 1 0 1 0

Pti»vr Arm "A* N'

Fig. 4. The power circuit of the 15 level line-to-line hybrid MLC

4. Simulation Results

The proposed system has been simulated using MATLAB/SIMULINK® software to verify the performance of the proposed configuration. Figure 5 shows the proposed simulated system.

v*„ IS 1

Dead heat Cunlrul V*) ( SVM \

Filter Grid JYW_

Fig. 5. The proposed current control scheme for grid applications.

The 3-phase grid voltage and injected currents have been sensed to generate voltages and currents in a-P reference frame that sent to the controller. The controller use a-P reference signal to generate voltages required for MLC to inject the required grid current that tracks the reference currents. The simulated system parameters are: filter inductance is 5mH, switching frequency of MLC is 3kHz, sampling time T is 100 p,s, grid voltage/frequency are 110V/50 Hz. Figure 6 shows the controller output a-P voltage signals required for MLC to generate its voltages. These signals as shown are equal in magnitude and 900 phase shift. During step change (at 0.1 sec) it can be note that these signals reach steady state very fast. As stipulated before, the MLC switches signals are generated based on space vector modulation technique. By using these a-P voltage signals, suitable MLC 3-phase voltages can be

generated as shown in Fig 7. Figure 8 shows the grid phase voltage (vaN) for MLC with 15 levels. These voltage waveforms near the sinusoidal waveform, so that the injected current will contains very lower total harmonic distortion values.

tn 100 £

0.05 0.06 0.07

0.12 0.13

time (sec)

Fig. 6. a-P output voltage for the MLC.

time (sec)

Fig. 7. MLC 3-phase output voltages.

Figure 9 shows the three phase actual injected current during step change in reference current. They have very fast response due to the deadbeat behaviour of the proposed controller. The injected grid currents are sinusoidal with THD less than 1% with only 5 mH filter inductance. This means that the system doesn't need custom filter in the output, which leads to higher output quality with lower system cost and light weight.

200 150 100 50 0 -50 -100 -150

0.14 0.16 time (sec) Fig. 8. MLC phase outputvoltage.

0.05 0.06 0.07 0.08 0.09 0.1 0.11 0.12 0.13 0.14 0.15 time (sec)

Fig. 9. Grid 3-phase currents after step change in reference current at time 0.1s

5. Conclusions

This paper presents cascaded H-Bridge multilevel inverter for grid connected PV system controlled by a digital deadbeat current controller. The controller is designed in ap reference frame and the paper introduces two cross coupling component for the current equations in ap reference frame to minimize current errors. The controller is designed in S-domain using derivative feedback to make the actual current to track exactly the reference current. The injected power to the grid controls the phase and amplitude of the MLC output current. The proposed system has been simulated using MATLAB/SIMULINK® software to verify the performance of the proposed configuration. The simulation results show that the output voltage is near the sinusoidal waveform. The injected current to the grid waveform almost is sinusoidal where the current THD is less than 1%. So that, there is no need for customized and heavy power filters because THD is less than international allowable standard values.

References

[1] Viet, L. H. et al., "Deadbeat Current Controller of Front-End Converter with State Observer-based Predictor", International Conference on Power Electronics and Drives Systems, PEDS 2005, Vol. 2, ppl547 - 1551.

[2] Yong Xue, Yuchuan Wu, Haixia Zhang, "An Adaptive Predictive Current-Controlled PWM Strategy for Single-Phase Grid-Connected Inverters", the 33rd Annual Conference ofthe IEEE IE Society (IECON), Taipei, Taiwan, Nov. 5-8, 2007.

[3] Daniel Martin and Enrico Santi, "Autotuning of Digital Deadbeat Current Controllers for Grid-Tie Inverters Using Wide Bandwidth Impedance Identification" IEEE Tran, on IA, Vol. 50, No. 1, January/February 2014, pp. 441-451.

[4] George, J. et al., "A Generalized Class of Stationary Frame-Current Controllers for Grid-Connected AC-DC Converters", IEEE Transactions on Power Delivery, Vol. 25, No. 4, Oct. 2010.

[5] Zmood D. N. and Holmes D. G., "Stationary frame current regulation of PWM inverters with zero steady-state error," IEEE Trans. Power Electron., vol. 18, no. 3, pp. 814-822, May 2003.

[6] Yuan X., Merk W., Stemmler H., and Allmeling J., "Stationary-frame generalized integrators for current control of active power filters with

zero steady-state error for current harmonics of concern under unbalanced and distorted operating conditions," IEEE Trans. Ind. Appl., vol. 38, no. 2, pp. 523-532, Mar./Apr. 2002.

[7] Phan V., et al., "Stationary frame control scheme for a stand-alone doubly fed induction generator system with effective harmonic voltages rejection", Electric Power Applications, IET, Vol. 5, Issue 9, 2011, pp. 697 - 707.

[8] Mahmoud Salem and YousryAtia, "Direct Current Control Techniques for Distributed Power Generation Grid-Connected Systems", 3rd International Conference on Advanced Control Circuits and Systems (ACCS'013), 30 Nov. - 03 Dec. 2013, Luxor, Egypt.

[9] Mubashwar Hassan, Saad Mekhelif, Mahrous Ahmed, "Three-phase hybrid multilevel inverter with less power electronic components using

space vector modulation", IET Power Electronics, Vol. 7, No. 5, 2014, pp. 1256 - 1265.