Scholarly article on topic 'Evaluation of a communication-based fault ride-through scheme for offshore wind farms connected through high-voltage DC links based on voltage source converter'

Evaluation of a communication-based fault ride-through scheme for offshore wind farms connected through high-voltage DC links based on voltage source converter Academic research paper on "Electrical engineering, electronic engineering, information engineering"

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Academic research paper on topic "Evaluation of a communication-based fault ride-through scheme for offshore wind farms connected through high-voltage DC links based on voltage source converter"

IET Renewable Power Generation

Selected Papers from the European Wind Energy Association 2014

Evaluation of a communication-based fault Received on 15th January 2015

■ ■ ■ ■ r rr ■ ■ ■ r Revised on 6th May 2015

ride-through scheme for offshore wind farms Accepted on 23 d June 2015

.... ■■ ■ doi: 10.1049/iet-rpg.2015.0017

connected through high-voltage DC links ~etdi.org based on voltage source converter

Sotirios Nanou Stavros Papathanassiou

School of Electrical and Computer Engineering, National Technical University of Athens (NTUA), 9 Iroon Polytechniou str., 15780 Athens, Greece ei E-mail: sotnanou@gmail.com

Abstract: Offshore wind farms connected to the mainland through high-voltage DC links based on voltage source converters (VSC-HVDC) are subject to grid code requirements, such as fault ride-through (FRT) capability and dynamic voltage support. To address the challenge of FRT capability, sophisticated control strategies are required, capable of handling the power imbalance between the two interconnection ends during onshore grid faults. This study proposes an FRT method which combines a de-loading control strategy for the offshore wind turbines, utilising the communication infrastructure of the VSC-HVDC system, with a DC chopper to dissipate the power surplus that cannot be effectively curtailed via the communication link. The impact of communication system latency on the expected FRT response and the required rating of the DC chopper is investigated using a linearised small-signal model introduced in this study, whose results are validated against time-domain simulations using detailed electromagnetic transient-type models for the entire system. It is concluded that the required rating of chopper resistors can be substantially reduced when existing communication capabilities are exploited, even in the presence of relatively high communication delays.

1 Introduction

Transmission system operators impose technical requirements for the connection of offshore wind farms (WFs) [1-3]. Among these, particularly important is fault ride-through (FRT) capability, which is combined with fast voltage support during onshore grid faults [2]. In the case of WFs directly connected to the onshore grid, such requirements have been fully recognised and suitable FRT control schemes have been introduced in the relevant literature (e.g. [3-6]) and in actual wind turbines (WTs). In the presence of high-voltage DC links based on voltage source converters (VSC-HVDC), however, more sophisticated control solutions are required, since the offshore WF network is decoupled from the onshore grid, and therefore the offshore WTs are unable to detect and respond to onshore grid disturbances, solely based on local measurements.

So far, research effort is mainly focused on the design of FRT control schemes for the VSC-HVDC link, which attempts to emulate onshore grid conditions at the offshore side, in order to trigger a fast active power reduction by the offshore WTs [7-12]. More specifically, a frequency modulation approach is investigated in [7-10, 12] for the offshore VSC station, in order to curtail active power using the frequency response capabilities of state-of-the-art WTs, whereas a controlled voltage dip method is also examined in [8-12], which is activated during DC over-voltage events and leads to a reduction of the active power generated by the WTs without causing their disconnection. A unified voltage and frequency controller is proposed in [12], in order to avoid a deep voltage dip at the offshore grid, while maintaining the rate of change of frequency within the df/dt withstands capability and protection settings of the offshore WTs. All these control techniques are rather complicated, require extensive modification of the standard HVDC, and WT control structures, often in a combined and coordinated manner not easy to achieve in practice, and present performance limitations and drawbacks discussed in the relevant literature [9, 10, 12].

On the other hand, state-of-the-art commercial VSC-HVDC systems employ DC choppers, typically installed at the onshore VSC station, to dissipate energy that cannot be delivered to the onshore side during grid faults, whereas operation of the WF remains unaffected [13-15]. Although this solution is simple and effective, its main drawback is that, relying solely on DC power dissipation to achieve FRT capability, inevitably leads to large DC choppers and resistors, rated for the high power (hundred megawatts (MW)) generated by the offshore WF.

In offshore WFs, communication facilities are already employed for power regulation and operation monitoring purposes [16-18]. Existing communication links can be utilised to implement supplementary FRT control solutions; however, special attention should be placed on the effect of communication latency, which could prevent a reduction of the WF output power sufficiently fast to maintain firm control of DC over-voltages. A communication-based FRT method is examined in [19], which utilises the measured HVDC voltage in order for the offshore VSC to dispatch fast de-loading signals to each WT controller on detection of DC over-voltage events. Even though a short communication delay of only 10 ms is assumed in this paper, DC voltage overshoots still occur in order to achieve FRT capability.

In the presence of communication delays, reliance solely on communications will not suffice and additional means, such as a DC chopper, will be needed for successful FRT performance. Still, exploiting existing communication capabilities can lead to potential reductions in DC chopper and resistor ratings, even in the presence of higher communication delays, as might occur in practice. This concept is explored in this paper for VSC-HVDC connected WFs, combining communication-based active power control with DC chopper resistors that dissipate only excess transient power. Particular attention is placed on the effect of communication latency, generally in the range of some tens of milliseconds [16, 18] depending on the bandwidth and the overall architecture of the communication system. In this paper, a suitable linearised model is introduced to quantify the effect of latency on

the expected FRT response and on the necessary rating of DC chopper and resistors. Results obtained are validated against time-domain simulations using detailed models for the VSC-HVDC system and the offshore WF. The effectiveness of the proposed FRT strategy is demonstrated by time-domain simulations of balanced and unbalanced onshore grid faults.

This paper is organised as follows: the main technical requirements imposed by present day grid codes (GCs) to offshore WFs are briefly discussed in Section 2. The study-case system is presented in Section 3. The control concept of each subsystem is briefly discussed in Section 4, whereas the linearisation approach adopted for the frequency-domain model is outlined in Section 5. Time-domain simulations are presented in Section 6 and the main conclusions are summarised in Section 7. Parameter values are provided in Appendix.

2 GC requirements for offshore WFs

Fig. 1a depicts a typical FRT curve, from the draft European Network of Transmission System Operators for Electricity (ENTSO-E) Network Code for HVDC connections [1]. The piecewise linear curve represents the voltage-against-time profile

U/p.u.,

Une2 U,tel

0 '■ tree I 2 £/g

Fig. 1 GC requirements for FRT capability of HVDC converter stations

a Voltage-against-time profile [1] b Required reactive current for voltage support [2]

envelope at the connection point, above which the generating units must remain connected to the network in the event of an onshore grid fault. Typical values for the retained voltage Uret are 0-0.3 pu, whereas tclear varies from 0.14 to 0.25 s. Parameters Ureci, trec1, Urec2, and trec2 define the shape of the FRT curve after fault clearance. Parameters Urec1 and Urec2 lie in the range of 0.25-0.85 and 0.85-0.9 pu, respectively, trec1 varies from 1.5 to 2.5 s, and trec2 varies from trec1 to 10 s [1].

Voltage support during grid faults is also required, by injecting reactive current according to a voltage-current characteristic, as the one shown in Fig. 1 b, where reactive current is supplied in the event of dips >5%, with a contribution of at least 2% of rated current per per cent of voltage variation. According to [2], the voltage control must be enforced within 20 ms after fault inception, whereas reactive current support up to 100% of the rated current is expected.

Generating units are also required to control their output power factor during normal operation or to perform active voltage regulation at the point of connection [1]. According to [2], each offshore generating unit must be able to regulate its output power factor down to 0.925, when operating at nominal onshore grid voltage and maximum active power transmission capacity. GCs include several additional requirements, such as the provision of frequency response, which are not dealt with in this paper.

3 Study-case system

The generic layout of the offshore WF under study is depicted in Fig. 2. Each WT is equipped with a permanent magnet synchronous generator (PMSG), using full-power converters. The WT is connected to the medium voltage (MV) collector system of the WF through an output LC filter and a step-up transformer. The WF installed capacity is 300 MW. The VSC-HVDC system comprises the offshore sending-end converter (SEC), the onshore receiving-end converter (REC) and a 100 km long submarine ±150 kV HVDC transmission line. The onshore grid is represented by its Thevenin equivalent. Specific parameter values are given in Table 1 of Appendix. A DC chopper resistor is also present at the onshore VSC station. Its rating depends on the performance of the communication-based FRT control, as further analysed in Section 5.

To simplify converter modelling and reduce computational burden, two aggregate 150 MW PMSG WTs are used to represent the entire WF. The WTs and HVDC stations are represented by detailed electromagnetic transient (EMT)-type models, including the converters and their controllers. The insulated gate bipolar transistor converters are modelled as ideal switches with anti-parallel diodes. Owing to the non-negligible capacitance of the HVDC cables, the distributed parameter line model is employed. All subsystem models, control schemes (analysed in Section 4) and associated pulse-width modulation (PWM) controllers are implemented in the SimPowerSystems Toolbox of MATLAB/SIMULINK using the EMT simulation method [20].

Fig. 2 Generic layout of an offshore WF connected through VSC-based HVDC transmission

4 Controllers

4.1 REC controller

power and HVDC voltage, respectively, whereas rch is the resistance of the DC chopper.

The overall REC controller is depicted in Fig. 3a. In normal operating conditions, the REC exports the incoming DC power to the onshore grid by regulating the HVDC voltage vdcR to its nominal value via a proportional-integral (PI) compensator. Regarding the inner control loop, a conventional current vector controller operating in the synchronous reference frame (SRF) is usually employed in order to regulate the inverter output current to the desired value [21]. However, as it will be demonstrated in Section 6.2, even though the SRF current controller regulates the positive sequence (PS) component of the output current satisfactorily, it fails to control its negative sequence (NS) component, thus leading to potential inverter over-current situations during severe unbalanced grid faults. For this purpose, the conventional PS current controller is amended in this paper, by integrating the NS current controller depicted in Fig. 3b, operating in the counter-rotating reference frame. Notch filters are placed along the NS current regulation path in order to suppress the PS component of the measured grid current iR, thus decoupling the NS and PS current controllers.

The synchronisation unit depicted in Fig. 3a comprises an SRF phase-locked loop (PLL) equipped with a PS extraction unit based on double second-order generalised integrator (DSOGI) filters, in order to handle unbalanced grid conditions, as explained in more detail in [22, 23].

To ensure GC compliance in case of grid faults, the REC controller should prevent over-currents and over-voltages, which could trip the VSC-HVDC link, while maintaining low response times. The primary concern in case of severe voltage dips is the rise of the HVDC voltage, as the REC active power transfer capability is drastically reduced. To counter this problem, an FRT control scheme is investigated in this paper, which relies on using the communication links shown in Fig. 2 in order to transmit fast active power curtailment commands to the offshore WT control units (WTCUs). DC chopper controlled resistors are present at the REC side to complement the solution, dissipating excess WF power. In this paper, the DC chopper is controlled by the simple hysteresis block shown in Fig. 3a, where the activation and deactivation voltage thresholds are 1.03 and 1.01 pu, respectively.

To calculate the power reduction command a dispatched to the SEC converter, an estimate of the maximum REC active power transfer capability pRmax is needed. In this paper, this is simply given by

^Rmax vg ^dmax

where v+ is the magnitude of the PS component of the grid voltage and Idmax is the current limiter used in the active current regulation path of the REC controller (Fig. 3a). Taking into account the GC stipulated voltage support during voltage dips, the Idmax limit depends on the injected reactive current i*R

I = IP —i*2

d max V max qR

where Imax is the rated current and i*R is calculated based on the voltage support characteristic of Fig. 1b, utilising the PS voltage magnitude v+ provided by the DSOGI-PLL (Fig. 3a).

The use of DC chopper at the onshore side permits implementing a more moderate active power reduction to the offshore WF. In this case, the de-loading signal a (a negative value, normalised on the pre-fault level of production) is determined by

s _ PRmax — pR0 | vdcR0/rch

4.2 SEC controller

The offshore VSC transmits the active power produced by the offshore WF, while regulating the AC voltage and frequency in the WF grid. As illustrated in Fig. 3c, a conventional PI controller regulates the offshore AC voltage magnitude, whereas the frequency is fixed at nominal value [10, 12].

The de-loading signal a is received by the REC controller via a communication link (i.e. fibre optic cables installed with the HVDC submarine cables), and then transmitted to the individual WTCUs to reduce the generated active power at the offshore side, utilising again the communication infrastructure of the offshore WF network. According to [16-19], such communication interfaces are usually implemented using standard Supervisory Control and Data Acquisition protocols, while the transmission media may be fibre optics [18, 19] or wireless links [24].

4.3 WT controller

The typical configuration of a PMSG WT is presented in Fig. 4a [6, 19, 25]. The PMSG is controlled by the machine side converter (MSC), which employs a rotor field oriented control scheme and provides the modulation indices m*ap to the PWM controller of the MSC, as explained in [6, 19]. The outer WT controller implements the maximum power point tracking strategy, which determines the

where pR0 and vdcR0 are the pre-disturbance values of the REC active

Fig. 3 HVDC converter controllers

a Overall REC control scheme b PS and NS current controllers c SEC control scheme

power order p*rd, usually employing a speed control loop. Further details can be found in [6, 25].

The grid side converter (GSC) delivers the active power generated by the PMSG to the offshore grid, by regulating the DC voltage vdc, WT to its reference value (1 pu), using the conventional SRF current control scheme of [21]. A PI voltage controller provides the reference for the active component of the output current, i*dWT, whereas the reactive power reference qWr is set to zero. The external power reduction command a modulates the active component of the current reference ¿dWT (Fig. 4b), thus reducing the WT active power during onshore disturbances. This concept is easily implementable, as it does not require any essential modification to the standard WT controllers. During FRT events, the induced over-voltage in the DC link of the individual WTs is controlled by a DC chopper, installed in the WT configuration (Fig. 4a) [15, 25], dissipating excess active power generated by the PMSG. The DC chopper is controlled by the simple hysteresis block as shown in Fig. 4b.

5.1 Closed-loop transfer function of the offshore WTCU

As it is depicted in Fig. 4b, the proposed de-loading technique of the WT during FRT events modulates directly the active current reference ¿dWT, whereas the PI voltage controller is suspended. Neglecting the effect of the PLL dynamics, the active power pWT injected by the GSC can be approximated by

pWT = VWTid,WT (4)

Perturbing and linearising around an equilibrium point, (4) yields

A pWT = vWT0Aid,WT + AvWTid,WT0 (5)

where vwT0 and ¿dWT0 are the pre-disturbance values of the voltage and active current, respectively, measured at the output of the GSC (Fig. 4a). Neglecting the small-signal component AvWT, the small-signal WT power A^WT can be approximated by

5 Small-signal modelling and parametric analysis of FRT response

To assess the FRT response of the entire VSC-HVDC and offshore WF system in a systematic manner, without resorting to time-domain simulations, a suitable frequency-domain model is introduced in this section, where the effect of the various controllers and the latency of the communication system are properly accounted for. Such a model provides insight on the significance of the various parameters and factors affecting the response of the system, permits the application of control techniques, and is also a valuable tool for conducting parametric studies, as in Section 5.3 below.

KWT0 A (/r ,

pWT — vWT0Aid,WT — d, WT (6)

i + stGSC

A pWT — vWT0Aid,WT — '

where tGsc is the equivalent time constant of the rapid GSC current control loop (a value of 1 ms is indicatively assumed here), whereas the small-signal reference Aid wt is given by

Ai*d,WT — sid,WT0

On the basis of (6) and (7), the induced active power deviation of the WT can be expressed by

A Pwt —

1 + st

Fig. 4 Typical configuration of a PMSG WT

a PMSG WT and WTCU structure b GSC controller and proposed de-loading technique

5.2 Small-signal model of the entire system for FRT response analysis

The objective of this section is to obtain a linearised model of the VSC-HVDC connected WF, in order to predict the HVDC voltage response during onshore voltage dips. For the symmetric monopole VSC-HVDC configuration of Fig. 2, the nominal n-model shown in Fig. 5a is used to model the HVDC cables in the frequency domain. The equivalent DC capacitance Ceq at each interconnection end is given by

Ceq — CV

: + Cdc/4

where CVSC, Cdc are the total DC capacitance at each VSC and each HVDC cable, respectively.

On the basis of the electrical circuit of Fig. 5a, the HVDC system is governed by the following differential equations:

idcS iL — Ceq dt

diL _ vdcS - vdcR

RdciL + Ldc — —

iL — ich — idcR — Ceq

dvdcR dt

(10) (11) (12)

where vdcS(R), idcS(R) are the voltage and current at the DC terminals of the SEC (REC), Rdc, Ldc are the lumped electrical characteristics of the HVDC cables, and iL, ich are the DC currents flowing through the cable and DC chopper, respectively.

In the following, (10)-(12) are expressed in per unit (pu) using the following base values (power: Sbdc, voltage: Vbdc, current: /bdc, and

Fig. 5 Linearised frequency-domain model of the entire VSC-HVDC and offshore WF system

a DC side equivalent employing the nominal n-model of the HVDC cables b Block diagram of the entire system employing a communication-based FRT control scheme along with a DC chopper controlled resistor

impedance: Zbdc):

Sbdc — SVSC Vbdc Vdcn Ibdc — Sbdc/Vbdc

Vbdc/2

Zbdc - ■

where vdcn is the nominal pole-to-pole HVDC voltage and SVSC is the VSC rated power. Perturbing and linearising around an equilibrium point and combining (10)-(12) with (13)-(16), the following differential equations are obtained (in pu):

AidcS - ML — 2stCAvdcS rdcAiL + skLMiL — AvdcS - AvdcR VdcR0, Avd

mch + rch rch

- Ai'dcR — ISTcDVd,

where rch is the resistance (in pu) of the DC chopper, mch is the control signal (Fig. 3a) representing DC chopper activation, kL is the ratio Ldc/Zbdc, and tc is the equivalent time constant of the DC capacitance Ceq

Ceqvdcn 2SVSC

linearised model is to estimate the expected FRT response under a worst-case operating scenario, leading to a drastic curtailment of the REC active power. Consequently, the terms iL0 + AidcS(R) shown in (21) and (22) are neglected in the following, leading to the simplified expressions:

APs - VdcS0AidcS APR - VdcR0AidcR

Combining (17)—(19) with (23) and (24), the DC voltage AvdcR at the REC terminals is expressed in the frequency domain by

Av r I APR vdcR0 m , APs

AvdcR — rHVDC I----mch + ■

vdcR0 'ch vdcS0G1

where the transfer functions GHVDC and G1 are given by

G =Gl= s22tC kL + s2rdctC + 1 HVDC G2 a3s3 + a2s2 + a1s + a0

a3 = 4tCkL, a2 = 2tC(2rdctC + kL/rch) a1 = 2tC(2 + rdc/rch), a0 = 1/rch

(26) (27)

On the basis of the REC controller depicted in Fig. 3a and (3), the power reduction factor a received by the WTCUs is approximated here by

1 + stso

2DVg + ■

dcR0 rch PR0

where Tsogi is the time constant (~5 ms [22]) representing the dynamic response of the DSOGI filters of the REC controller, whereas a 100% REC active power reduction is expected (a = -1) for a 50% onshore voltage dip Avg according to (1) and (2).

Assuming a communication delay Tcom and taking into account the effect of the WTCU dynamics described in Section 5.1, the small-signal SEC active power ApS is then approximated by

A ps —

spWT0 e

1 + sTCr

Combining (25)-(29), the closed-loop system of Fig. 5b is obtained in block diagram form, based on which the DC voltage response AvdcR can now be calculated during onshore voltage dips, by solving the following equation in the time domain:

AvdcR(0 = L-1 j Ghvdc(S)( Gv(s)Avg(s) + Gm(sKh(s)) ) (30) where mch(s) = 1/s and the transfer functions Gv and Gm are given by

Gv(s) — -^ +

2 pWT0 e

'dcR0 r1 (s)vdcS^1 + stsogi) 0 + StGSc)

r — dcR0 ,

rm(s) — - —--+ " / \ , ,

^ G1(s)rchVdcS0 P«^1 + ■"'sogi)!1 + stGSc)

2 — sT

VdcR0 ^WT0e co

Following a similar approach, the small-signal components of the SEC and REC active powers, ApS and ApR, are expressed by:

A Ps = vdcS0AidcS + (iL0 + AidcS)AvdcS (21)

A ^R = vdcR0AidcR + (iL0 + AidcR)AvdcR (22)

As it will be explained in Section 5.3, the main objective of the

5.3 Parametric analysis

In this section, a parametric analysis is conducted using the developed linearised model in order to show the effect of the communication delay on the required rating of the DC chopper, to achieve successful FRT response. A worst-case operating scenario is selected, that is, while the WF is operating at its rated power, a

step voltage dip Avg of 50% takes place, reducing REC active power export capacity by 100%. Successful FRT response is considered to be achieved when the resulting over-shoot of the HVDC voltage remains below 20%. A measure of the required rating of the DC chopper resistor is its maximum power Pch,max calculated by

values provided in Table 1 of Appendix. In all scenarios, the WF initially generates its rated power, whereas the equivalent time constant tvsc is assumed 40 ms.

vdcR, max

where vdcRmax is the maximum permissible HVDC voltage (here 1.2 pu).

In Fig. 6, the required maximum DC chopper power is plotted against the communication latency Tcom, for two different tvsc values (equivalent time constants of the DC capacitance at each VSC) reported in the literature for state-of-the-art VSCs for HVDC applications [26]. Solid lines are used for the results obtained with the linearised small-signal model. To validate its accuracy, the detailed EMT-type model of the system is used as a reference (Section 3, using the parameter values provided in Table 1 of Appendix). Results shown in Fig. 6 refer to a 50% voltage dip at the 400 kV side of the REC transformer (Fig. 2), while the WF is generating its maximum power. Comparing the two modelling approaches, the linearised model overestimates the required chopper power (by up to 10%), since errors are introduced by the linearisation process. Nevertheless, the proposed linearised model still provides fairly accurate results.

From Fig. 6, it is clear that the communication delay Tcom drastically affects the required rating of the chopper resistor in order to achieve FRT capability, whereas the effect of the equivalent time constant tVSCof the DC capacitance at each VSC is also important. It is evident that a communication delay of 2030 ms leads to a successful FRT response without the need of a DC chopper. On the other hand, when higher communication delays are involved (i.e. above 60-80 ms), the DC chopper is the prime component ensuring FRT capability for the WF. An important observation is that the required rating of the DC chopper can be substantially reduced, when existing communication capabilities are exploited to activate a fast reduction of the WT output power; ratings reduced by up to 50%, compared with a fully rated DC chopper, may suffice, even in the presence of relatively high communication delays (in the range of 40-60 ms). Consequently, depending on the design characteristics of the VSCs and the communication system, different solutions exist for the required rating of the DC chopper.

6 Time-domain simulations

In this section, the FRT response of the VSC-HVDC offshore WF is evaluated under balanced and unbalanced grid faults. The system depicted in Fig. 2 is used as a study case, using the parameter

Fig. 6 Effect of the communication delay Tcom on the required power rating of the DC chopper resistor. The sizing criterion applied is to contain DC over-voltages below 20%, even for worst-case onshore voltage dips leading to zero REC active power export

Fig. 7 Response following a three-phase voltage dip at the 400 kV side of the REC transformer, relying solely on communication-based WF active power control (Tcom = 32 ms)

a PS onshore grid voltage b REC active output current c REC reactive output current d REC active output power

6.1 Response for balanced onshore voltage dips

The objective of this section is a two-fold one: first, to show that the simulated VSC-HVDC offshore WF provides a GC compliant

transient response and second to validate the analysis presented in Section 5 regarding the effect of the communication delay Tcom on the required rating of the DC chopper, in order to achieve FRT capability.

Fig. 8 Response for the same disturbance as in Fig. 7, assuming different communication delays and DC resistor ratings

a REC DC voltage b Offshore WF active output power c DC chopper power

d Energy dissipated in the DC chopper resistor

Fig. 9 Response following a two-phase-to-ground fault at the 400 kV side of the REC transformer, relying solely on communication-based WF active power control (Tcom = 32 ms)

a PS onshore grid voltage b REC active output current c REC reactive output current d REC active output power

A three-phase voltage dip at the 400 kV side of the REC transformer is simulated in Fig. 7, lasting 200 ms and resulting in a remaining voltage of 50% at the REC terminals (output of the AC filters depicted in Fig. 2). The simulation results in Fig. 7 are obtained utilising solely the communication-based WF active

power control, assuming a time delay of 32 ms (see Fig. 6). During the onshore voltage dip, the voltage support mode of the REC controller is activated, controlling its reactive output current iqR to the reference imposed by the GC (-1 pu in this case),

Fig. 10 Response for the same disturbance as in Fig. 9, assuming different communication delays and DC resistor ratings

a REC DC voltage b Offshore WF active output power c DC chopper power

d Energy dissipated in the DC chopper resistor

Fig. 11 Response following a single-phase fault at the 400 kV side of the REC transformer, relying solely on communication-based WF active power control (Tcom = 32 ms)

a PS onshore grid voltage b REC active output current c REC reactive output current d REC active output power

within ~40 ms after fault inception. The Idmax limiter shown in Fig. 3a suppresses the REC active output current idR, and therefore the REC active power pR, down to zero (Fig. 7d).

To demonstrate more clearly the benefits that the communication-based approach offers for FRT purposes, the

Fig. 12 Response for the same disturbance as in Fig. 11, assuming different communication delays and DC resistor ratings

a REC DC voltage b Offshore WF active output power c DC chopper power

d Energy dissipated in the DC chopper resistor

system response is simulated in Fig. 8 for three different cases. In the first one (blue solid curve), the FRT response is demonstrated for the maximum communication delay Tcom (32 ms) that achieves FRT capability without the need for an onshore DC chopper. It is evident that the DC voltage vdcR remains below 1.2 pu (Fig. 8a), whereas the WF output active power pWF is effectively curtailed (Fig. 8b).

As explained in Section 5.3, onshore DC choppers are inevitably required in the presence of higher communication delays in order to avoid unacceptable DC over-voltages. To confirm this, additional time-domain simulations are included in Fig. 8 (green dashed curve), assuming a communication delay of 50 ms. In this case, a 125 MW (peak power) DC chopper is required (Fig. 8c) to contain DC over-voltages below 20%, while the WF active power does not reduce to zero. If a fully rated DC chopper is employed (red line curve - 300 MW chopper), then DC voltage is better controlled and FRT could be achieved without reducing the output power of the WF.

Exploiting communication capabilities to reduce the WF output power has a positive impact on the energy dissipated on the DC resistors Ech, besides maximum power. For the aforementioned study case, the energy dissipated on the DC chopper resistor throughout the event is ~30 MJ (Fig. 8d), thus achieving a substantial reduction of 60%, compared with an FRT solution which relies solely in a fully rated DC chopper (red dashed curve).

6.2 Response for unbalanced onshore grid faults

To assess the performance of the VSC-HVDC offshore WF in unsymmetrical conditions, zero impedance unbalanced grid faults are simulated at the onshore connection point, whereas the WF is operating at rated power. The response of the system is first tested for a two-phase-to-ground fault at the 400 kV side of the REC transformer, lasting again for 200 ms and resulting in a remaining PS voltage of 42% at the REC terminals (Fig. 9a). The evaluation of the overall performance of the REC controller is similar as in Section 6.1. The transient response presented in Figs. 9b and c confirms the importance of introducing the NS current controller shown in Fig. 3b, since the PS current controller alone fails to suppress the NS current component, thus inducing an inverter over-current of ~1.2pu in one phase. The REC active power pulsations (Fig. 9d) are induced by the NS voltage component.

The DC voltage, WF export power, and DC resistor thermal load are shown in Fig. 10, for the same communication delay and chopper ratings as in the previous section. Results are practically the same as in Fig. 8, since the PS voltage dip is similar in both cases. The generated active power at the offshore side is not affected by the unbalanced onshore conditions, since the de-loading signal a is calculated using the PS voltage v+ provided by the DSOGI-PLL of the REC controller.

The system response for single-phase faults is depicted in Figs. 11 and 12. A remaining PS voltage of 0.72 pu at the REC terminals causes a reactive current injection of 0.56 pu within 20 ms after fault inception. The impact of this fault is notably reduced, compared with the three-phase and two-phase faults, since the REC active output power is now less constrained (Fig. 11 d). Hence, even though there is a great difference in the instantaneous DC chopper power (Fig. 12c) between half and fully rated DC choppers, the energy dissipation in Fig. 12d is similar in both cases.

7 Conclusions

In this paper, an FRT control concept was investigated for VSC-HVDC connected WFs, utilising communications along with a DC chopper at the onshore VSC station to dissipate any transient active power surplus that may lead to excessive DC over-voltages. For the dimensioning of the chopper resistor, a parametric analysis was performed using a suitable linearised small-signal model. Results obtained were validated against detailed time-domain simulations. It was shown that the utilisation of existing communication capabilities for FRT purposes can offer significant

potential for reduction in the required DC chopper rating, by up to ~50% compared with a fully rated chopper, even in the presence of relatively high communication delays (in the range of 40-60 ms), and therefore significant savings in cost and deployment space for the DC chopper and resistors.

The FRT response of the entire VSC-HVDC and offshore WF system was also investigated for different fault types, including three-phase, two-phase, and single-phase faults. In all cases, the system exhibits GC compatibility, being capable of withstanding severe voltage dips, without unacceptable inverter over-current or DC over-voltage events, providing at the same time voltage support to the network, as stipulated by GCs.

8 Acknowledgment

The work of Sotirios Nanou is supported by the IKY Fellowships of Excellence for Postgraduate Studies in Greece - Siemens Program.

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10 Appendix

Study-case system parameter values (see Table 1). Table 1 Study-case system parameters

Onshore grid Nominal voltage Short-circuit impedance HVDC cable Length Resistance Inductance Capacitance HVDC VSC Nominal power Nominal AC voltage Pole-to-pole DC voltage DC capacitance Phase reactor Capacitance of AC filters Switching frequency Converter transformers Nominal power Onshore voltage ratio Offshore voltage ratio Leakage reactance Losses

400 kV 8/80° V

100 km 0.022 n/km 0.191 mH/km 0.295 ^F/km

325 MVA 150 kV 300 kV 290 ^F 35 mH 2.3 ^F 1950 Hz

380 MVA 150/400 kV 33/150 kV 10% 0.5%