A Comparative Study of Sinusoidal PWM and Third Harmonic Injected PWM Reference Signal on Five Level Diode Clamp Inverter

Wanchai Subsingha

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Energy Procedia 89 (2016) 137 - 148

CoE on Sustainable Energy System (Thai-Japan), Faculty of Engineering, Rajamangala University

of Technology Thanyaburi (RMUTT), Thailand

A Comparative Study of Sinusoidal PWM and Third Harmonic Injected PWM Reference Signal on Five Level Diode Clamp

Inverter

Wanchai Subsingha

Rajamangala University of Technology Thanyaburi 39Moo 1, Rangsit-NakhonnayokRd. Klong 6,Thanyaburi Pathum Thani 12110, Thailand

Abstract

This paper present the comparative modulation of Sinusoidal PWM and Third Harmonic Injected PWM Reference signal with carrier signal PD, POD, and APOD on 5 Level Diode Clamp on a R-L load. All of process are simulate with computer program MATLAB/Simulink. The result of simulation has shown value of THDV line-line output voltage on both SPWM inverter and Third Harmonic Injection modulation inverter with PD carrier signal generate a minimum THDV.

Peer-review under responsibility of the organizing committee of the 12th EMSES 2015 Keywords: DC-MLI; SPWM; Harmonic Injected PWM; PD; POD; APOD; THDV

1. Introduction

Multilevel inverter is a most popular for the industrial and electric power systems, because of it is high performance and low Harmonics. There are various types of Multi-Level Inverters such as Neutral-point clamped (NPC) or Diode Clamped (DC) inverter, Flying capacitor inverter and Cascade inverter. The difference among these kinds is as follow, when level of output voltage of Neutral-point clamped (NPC) or Diode Clamped inverter is

* Corresponding author. Tel.: +662-549-3420; fax: +662-549-3422 E-mail address: wanchai.s@en.rmutt.ac.th

Peer-review under responsibility of the organizing committee of the 12th EMSES 2015 doi:10.1016/j.egypro.2016.05.020

increased, a number of diodes is also increased accordingly. When level of output voltage of Flying capacitor inverter is increased, a number of capacitor is also increased. It leads into higher cost and more switching losses. Cascaded multilevel inverters have advantages and benefits than the other, because it need no require in balancing capacitors and diodes, in another way it just need a separate DC source for each H-Bridge. [1]

Therefore, in this paper, Diode Clamped Inverter is used for comparative study, especially in carrier based SPWM and HIPWM. However the configurations of their modulation techniques are PD, POD and APOD as shown

Fig. 1 Structure of the modulation scheme that is used in this paper

2. Background

2.1. Diode Clamped Inverter

The first invention in multilevel converters was called as a neutral point clamped inverter. It was initially proposed of a 3 phase three level inverter. [2]

The main benefits and drawbacks of this topology are:

• The performance of its output waveform is high, especially at fundamental frequency.

• The whole capacitors have to be pre-charged at the beginning of the operation.

• Output voltage level depends on the capacitor voltage. In which, the equality of their capacitor is needed in order to keep the balancing of the 3 phase output voltage.

2.2 Reference Signal

To generate Sinusoidal PWM signal a sine wave is provided as a reference signal. The frequency of a sine wave is equal to the frequency of the desired output voltage to the modulation of the carrier signal. The switching frequency of carrier signal must be higher than reference signal frequency as triple-N number. When both signals are modulated, it will generate the signal pulse for the switching devices for the inverter [3] as shown in Fig.2

Fig. 2. Sinusoidal Pulse Width Modulation HIPWM

In order to generate a Harmonic injection PWM signal, it may considered in a reference signal. The frequency of a reference signal must be the same of the desired output frequency. The reference signal is composed of fundamental and third harmonic frequency components as following equations. [4]

m. {sin (¿y0 t) + k. sin (3 t)}

+120°) + &.sin(3 .o)0 /)j jw.|sin(<0o. + 240°) + &.sin(3.co0 k.sin (3 m0t)

Amplitude of k is between 0.15 and 0.2. As a result, the waveform shown in Fig.3

VmC -VmK =

Fig. 3. Harmonic Injection reference signal.

The reference signal that is a Harmonic injection signal which will be modulated with carrier signal as shown in Fig.3. After modulation, it will generate the signal pulse to the switching devices in the inverter as shown in. Fig.4

Fig. 4. Harmonic Injected Pulse Width Modulation

2.3. Modulation Techniques

The modulation techniques that used in this paper are in 3 models Phase Disposition (PD), Phase Opposition Displacement (POD), and Alternative Phase Opposition Displacement (APOD) [5].

Phase Disposition (PD) modulation technique means that all of the carrier signals are in phase as shown in Fig.5.

Time (S)

Fig. 5 Phase Disposition (PD) modulation technique for Five Level DCMLI.

Phase Opposition Disposition (POD) modulation techniques means that the carrier signals above the zero line of sinusoidal modulating waveform are 180 out of phase, comparing with the carrier signal below the zero line as shown in Fig.6.

Fig.6. Phase Opposition Disposition (POD) modulation technique for Five-Level DCMLI

Alternative Phase Opposition Disposition (APOD), modulation techniques means that each carrier signal is phase shifted by 180° from its adjacent carriers as shown in Fig.7.

Fig.7. Alternative Phase Opposition Disposition (APOD) modulation technique for Five-Level DCMLI

3. Simulation Results

3.1. Modulation signal

A modulation signal a carrier based SPWM and HIPWM on various methods such as PD, POD, and APOD are shown as Fig.8 to Fig.13.By the way, these simulation results are done by using MATLAB/ Simulink program.

Time (S)

Fig.8. Modulation signal of SPWM Inverter on PD modulation technique

o 0.002 0.004 0.006 0.008 0.01 0.012 0.014 0.016 0.018 0.02

Time ($)

Fig.9. Modulation signal of SPWM Inverter on POD modulation technique

o 0.002 0.004 0.006 0.008 0.01 0.012 0.014 0.016 0.018 0.02 Time (S)

Fig.10. Modulation signal of SPWM Inverter on APOD modulation technique

VSa4 0

Q 0.002 0,004 0.006 0.008 0.01 0.012 0,014 0.016 0.013 0.02 Time (S)

Fig. 11. Modulation signal of HIPWM Inverter on PD modulation technique

ni l III I III 11__-

Via: |

0 0.002 0.004 0.000 0.008 0.01 0.012 0.014 0.016 0.018 0.02

Time(S)

Fig.12. Modulation signal of HIPWM Inverter on POD modulation technique

ol— I llllllll H11 III! I llllll 11 ,H III 11 llll III......I............;............;............;............;...........-

Vi.n? I

.... ... : . ...... ...

i| : : ' ; : llllll;Mill I llllllll III riTTnnJT

VSa4:.............. ......................................:

oh_;_;_._;_;_llllll II II llllllll_:

0 0 002 0 004 0 006 0.008 0.01 0.012 0.014 0 016 0 010 0.02 Time (S)

Fig.13. Modulation signal of HIPWM Inverter on APOD modulation technique

3.2. Five Level Diode Clamped Inverter

Therefore, this modulation method as described above has done by a five level diode clamp inverter which supported modulation and compare the values from section 3.1. The parameters from Table 1 is used with the circuit of 5 level DC-MLI as shown in Fig.14.

Table 1. Experimental parameters.

Parameters

Output Frequency Switching frequency Input Voltage

C1 ,C2 ,C3 ,C4 Load RL

Specifications

50 Hz 4850 Hz 540 Vdc 22,000 ^F 1kW ,PF 0.8

Fig.14. The configuration of Five Level Diode Clamped Inverter

Table 2. Switching states for Five Level DCMLI

Vdc/2 Vdc/4 0

-Vdc/2 -Vdc/4

Sa1 Sa2 Sa3 Sa4 Sa'1 Sa'2 Sa'3 Sa'4

1 1 1 1 0 1 0 0 0 0

0 0 0 0 0 0 1 0 1 1

3.3. FFT Analysis of THDv

This paper will study impact of the THDV of the output voltage of the five level diode clamp inverter .Either no-load and RL load a 1kW and PF = 0.8 with modulation signal from section 3.1.

As a result, the THDV value of Vab of each modulation scenario has shown as Fig.15 to Fig.26.

Fig. 15. THDV of output voltage (Vab) of SPWM Inverter on PD modulation technique at no load condition

Fig.16. THDV of output voltage (Vab) of SPWM Inverter on POD modulation technique at no load condition

Fig.17. THDV of output voltage (Vab) of SPWM Inverter on APOD modulation technique at no load condition

• D^ptty ugnai Diaptoy FFT wnd&w

Selected signal: 17.5 cycles. FFT window (In red): 3 cycles

Fundamental (50Hz) = 555.4 , THD- 12.05%

FFT -rrf.li S 4.5 i * i 3 S » Ï " e a - 1 5 • J-J.I _ I ... I ,.,....., i ..i ,_ . . I.I l l.l

Fig. 18. THDv of output voltage (Vab) of HIPWM Inverter on PD modulation technique at no load condition

Fig.20. THDv of output voltage (Vab) of HIPWM Inverter on APOD modulation technique at no load condition

90 100

Fig.21. THDv of output voltage (Vab) of SPWM Inverter on PD modulation technique at 1 kW, PF 0.8 load condition

Fig.22. THDv of output voltage (Vab) of SPWM Inverter on POD modulation technique at 1 kW, PF 0.8 load condition

Fig.23. THDv of output voltage (Vab) of SPWM Inverter on APOD modulation technique at 1 kW, PF 0.8 load condition

Fig.24. THDv of output voltage (Vab) of HIPWM Inverter on PD modulation technique at 1 kW, PF 0.8 load condition

Fig.25. THDv of output voltage (Vab) of HIPWM Inverter on POD modulation technique at 1 kW, PF 0.8 load condition

Fig.26. THDv of output voltage (Vab) of HIPWM Inverter on APOD modulation technique at 1 kW, PF 0.8 load condition

Fig.27. Output voltage waveforms of HIPWM Inverter on PD modulation technique at 1 kW, PF 0.8 load condition

Fig.28. Output voltage waveforms of HIPWM Inverter on POD modulation technique at 1 kW, PF 0.8 load condition

4. Conclusion

Table 3. The comparative results of their output voltage THDv.

Type of Modulation technique THDv (Load 1kW, PF0.8) THDv (No Load)

SPWM 18.13% 16.20%

HIPWM 12.38% 12.05%

SPWM 12.59% 20.42%

HIPWM 12.59% 12.31%

SPWM 26.96% 24.23%

HIPWM 12.59% 12.23%

A comparative modulation of Sinusoidal PWM and Third Harmonic Injected PWM Reference signal with carrier signal PD, POD, and APOD on 5 level diode clamp with a R-L load=1kW PF=0.8 and no load are studied in this paper. The result of simulation shown that a PD carrier signal have a minimum value of THDv line-line output voltage on Third Harmonic Injection modulation

References

[1] A. Nabae, I. Takahashi, and H. Akagi, "A new neutral-point clamped PWM inverter," IEEE Trans.ind. App., vol.19, no.5, pp. 518-523, Sept./Oct.1981.

[2] R. Kumar Ahuja1, A. Kumar, "MATLAB Simulation and Analysis of Nine-Level Inverter Using Different Schemes of Sinusoidal PWM" International Journal of Innovative Research in Science Engineering and Technology, pp. 13626-13633, 6 June 2014.

[3] V. Naga haskar Reddy, Ch. Sai. Babu and K. Suresh, "Advanced Modulating Techniques for Diode Clamped," APRN J Eng Appl Sci , vol.6, no.5, pp. 90-99, Jan 2011.

[4] X. Zheng, L. Song, and P. Hongying, "Study of Five-level diodes-clamped Inverter Modulation Technology Based on Three-harmonic Injection Method," EMETT-2012., pp.1973-1976.

[5] Mahmud Ismaila, Idris Ismail and Nor Zaihar Yahaya, "A Comparative Study of SPWM on A 5-Level H-NPC Inverter" Research Journal of Applied Sciences, Engineering and Technology, pp. 2277-2282, July 30, 2013.

A Comparative Study of Sinusoidal PWM and Third Harmonic Injected PWM Reference Signal on Five Level Diode Clamp Inverter Academic research paper on "Materials engineering"

Abstract of research paper on Materials engineering, author of scientific article — Wanchai Subsingha

Similar topics of scientific paper in Materials engineering , author of scholarly article — Wanchai Subsingha

Academic research paper on topic "A Comparative Study of Sinusoidal PWM and Third Harmonic Injected PWM Reference Signal on Five Level Diode Clamp Inverter"